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Lista publikacji


Rozprawa doktorska

T. Garbolino: “Liniowe generatory testów wykrywających uszkodzenia w samotestowalnych układach cyfrowych”. Rozprawa doktorska. Promotor: dr hab. inż. Andrzej Hławiczka, prof. nzw. Politechniki Śląskiej. Politechnika Śląska, Wydział Automatyki, Elektroniki i Informatyki., Gliwice, 2002, 144 str

Artykuły i referaty konferencyjne:

1995

  1. T. Garbolino: “Optimised synthesis of self-testable finite state machine using BIST-PAT structures in PLDs”, [in:] Proceedings of International Conference Programmable Devices and Systems – PDS’95, 9-10 November 1995, Gliwice, Poland, pp. 51 58.

1996

  1. T. Garbolino: “Wbudowane generatory testów deterministycznych dla samotestowalnych układów ASIC”. Elektronika 1996, R. 37, nr 6, str. 21-26.

  2. T. Garbolino, A. Kristof: “ICs' output modification for interconnections testing purpose”, [in:] Proceedings of International Conference Programmable Devices and Systems – PDS’96, 26-28 November, 1996, Ostrava, Czech Republic, pp. 101 107.

1998

  1. T. Garbolino, A. Hławiczka, „Test Pattern Generator for Delay Faults Based on LFSR with D, T Flip Flops and Internal Inverters”, Design and Diagnostics of Electronic Circuits and Systems Workshop, 2 4 September 1998, Szczyrk, Poland, pp. 153-160.

1999

  1. Garbolino T., Hławiczka A.: „Synthesis and Analysis of New LFSRs with D and T Flip Flops, Inverters, XOR and IOR Gates”, 11th Workshop on „Test Technology and Reliability of Circuits and Systems” (TWS’99), 28th February-2nd March 1999, Potsdam, Germany.

  2. T. Garbolino, A. Hławiczka: “Nowe rejestry liniowe ze sprzężeniami wykorzystującymi przerzutniki T oraz bramki XOR, IOR i NOT”, KST 1999

  3. Garbolino, T. And Hlawiczka, A. (1999). Design of Test Pattern Generator Using a New LFSR with D and T Flip Flops. In: Handouts of ETW'99 - IEEE European Test Workshop, Constance, Germany, May 25-28, 1999.

  4. Garbolino, T. and Hlawiczka, A (1999). A New LFSR with D and T Flip Flops as an Effective Test Pattern Generator for VLSI Circuits. In: Lecture Notes in Computer Science (Proc. of EDCC 3 - Third European Dependable Computing Conference, Prague, Czech Republic, September 15-17, 1999) (J. Hlavicka, E. Maehle, A. Pataricza, Eds.). Vol. 1667, pp. 321-338. Springer Verlag Press, Berlin.

2000

  1. T. Garbolino, A. Hławiczka: “Initialisation of BIST Circuits Based on Rule 60 Cellular Automata”, Preprints of IFAC Workshop On Programmable Devices and Systems PDS 2000, Ostrava, Czech Republic, February 8th-9th, 2000, str. 121 126.

  2. Garbolino, T., Hlawiczka A., Kristof A. “Fast and Low Area TPGs based on T-type Flip Flops can be Easily Integrated to the Scan Path”, Proc. of European Test Workshop – ETW’00, Cascais, Portugal, May 23 26, 2000, Computer Society Press, str. 161 166.

  3. T. Garbolino, A. Hławiczka: “Easy Integration of Based on T-type Flip Flops Test Pattern Generators to the Scan Path”, Proc. of The 7th International Conference Mixed Design of Integrated Circuits and Systems – MIXDES 2000, Gdynia, Poland, 15 17 June 2000, str. 523 526.

  4. T. Garbolino, A. Hławiczka: “Ustawianie stanu początkowego liniowych generatorów testów zbudowanych w oparciu o przerzutniki T”, Materiały Krajowego Sympozjum Telekomunikacji KST’2000, Bydgoszcz, 6 8 września 2000, str. 95 101.

  5. T. Garbolino, A. Hławiczka: “Deterministic TPG Based on Modified Feedback Shift Register Composed of D and T Flip Flops”, Proc. of International Conference on Signals and Electronic Systems, Ustroń, Poland, 17 20 October 2000, str. 195 200.

2001

  1. T. Garbolino, A. Hławiczka: “On the Design of New Efficient Cellular Automata Structures for Built In Test Pattern Generators”, Proc. of The 8th International Conference Mixed Design of Integrated Circuits and Systems – MIXDES 2001,Zakopane, Poland, 21-23 June 2001, str.

  2. O. Novak, A. Hławiczka, T. Garbolino at all.: “Low Hardware Overhead Deterministic Logic BIST with Zero Aliasing Compactor”, Proc. of the Fourth International Workshop on IEEE Design and Diagnostics of Electronic Circuits and Systems – IEEE DDECS 2001, Györ, Hungary, 18-20 April, 2001, str. 29 35.

  3. T. Garbolino, N. Henzel, A. Hławiczka: “Using Genetic Algorithms to Design Efficient Built In Test Pattern Generators”, Proc. of IFAC Workshop on Programmable Devices and Systems – PDS 2001, Gliwice, November 22nd 23rd, 2001, str. 263 268.

2002

  1. T. Garbolino, A. Hławiczka: “Efficient Test Pattern Generators Based on Specific Cellular Automata Structures”. Microelectronics Reliability, Elsevier Publishing Ltd. Volume 42, Issue 6, June 2002, pp. 975–983

2003

  1. Garbolino T., Hławiczka A.: Integration of a long test pattern generator composed of T type flip-flops into a scan path, [in:] Srovnal V., Vlcek K. (eds.): A proceedings volume from the 6th IFAC Workshop Programmable Devices and Systems, Ostrava, Czech Republik, 11-13 February 2003. Pergamon Press 2003, pp. 281-286

2004

  1. Garbolino T., Papa G., Hławiczka A.: Bioinspired optimization methods and their applications, [in:] : Filipic B., Silc J. (eds.): Proceedings of the international conference BIOMA 2004, Ljubljana, Slovenia, 11-12 October 2004. Ljubljana : Jozef Stefan Institute 2004, pp. 115-126

  2. Novak O., Pliva Z., Nosek J., Hławiczka A., Garbolino T., Gucwa K.: Test-per-clock logic BIST with semi-deterministic test patterns and zero-aliasing compactor. JOURNAL OF ELECTRONIC TESTING: Theory and Applications, No. 20, 2004, pp. 109-122

  3. Hławiczka A., Garbolino T.: A novel method of designing linear ring generators and compactors, [in:] Proceedings of IFAC Workshop on Programmable Devices and Systems. PDS 2004, Cracow, November 18th -19th, 2004. Gliwice: Silesian University of Technology 2004, pp. 208-215

  4. Garbolino T., Hławiczka A., Kristof A.: "A New Idea of Test-Per-Clock Interconnect BIST Structure", [in:] Proceedings of East-West Design & Test Workshop - EWDTW'04, 23-26 September 2004, Yalta, Alushta, Crimea, Ukraine, pp. 23-29

2005

  1. Hławiczka A., Gucwa K., Garbolino T., Kopeć M.: On detection of interconnect faults by a MISR compactor - unknown problems and new solutions. Theoretical and Applied Informatics, Vol. 17, No. 2, 2005, pp. 109-126

  2. Novak O., Drabek V., Hławiczka A., Gucwa K., Garbolino T.: BIST Built-In Self-Test, [in:] Novak O. et al. (eds.): Handbook of testing electronic systems. Praha: Czech Technical University Publishing House, 2005, pp. 227-299

  3. Hławiczka A., Gucwa K., Garboino T., Kopeć M.: Can a D flip-flop based MISR compactor reliability detect interconnect faults?, [in:] Takach G. et al. (eds.): Proceedings of 8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. DDECS 2005, Sopron, Hungary, April 13-16, 2005. Sopron: University of West Hungary, 2005, pp. 2-10

  4. Garbolino T., Hlawiczka A., Papa G., Novak F.: On design of a low-area deterministic test pattern generator by the use of genetic algorithm, [in:] (eds.) The experience of designing and application of CAD. Proceedings of the VIIIth International Conference CADSM 2005, Lviv - Polyana, Ukraine, 23-26 February 2005. Lviv : Publishing House of Lviv Polytechnic National University 2005, pp. 392-393

2006

  1. Garbolino T., Kopeć M., Gucwa K., Hławiczka A.: On the use of multi-signature analysis for interconnect test. Elektronika 2006, Vol. 47, No. 10, pp. 16-18

  2. Kopeć M., Garbolino T., Gucwa K., Hławiczka A.: Test-per-clock detection, localization and identification of interconnect faults, [in:] (eds.) Proceedings of 11th IEEE European Test Symposium ETS 2006, Southampton, United Kingdom, 21-24 May 2006. Piscataway : Institute of Electrical and Electronics Engineers 2006, pp. 233-238

  3. Garbolino T., Kopeć M., Gucwa K., Hławiczka A.: Detection, localisation and identification of interconnection faults using MISR compactor, [in:]: (eds.) Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, April 18 21, 2006. Institute of Electrical and Electronics Engineers, 2006, pp. 228-229

  4. Garbolino T., Kopeć M., Gucwa K., Hławiczka A.:Multi-signature analysis for interconnect test, [in:] Napieralski A. (ed.) Proceedings of the International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2006, Gdynia, Poland, 22 24 June 2006. Łódź: Politechnika Łódzka. Wydział Elektrotechniki i Elektroniki. Katedra Mikroelektroniki i Technik Informatycznych 2006, pp. 577-582

2007

  1. Kopeć M., Garbolino T., Gucwa K., Hławiczka A.: Reliable measurement of interconnect delays in presence of crosstalk-induced noise, [in:] Informal Digest of Papers of 12th IEEE European Test Symposium - ETS '07, Freiburg, Germany, May 20 24, 2007, pp. 167-172

  2. Papa G., Garbolino T., Novak F., Hławiczka A.: Deterministic test pattern generator design with genetic algorithm approach. Journal of Electrical Engineering, Vol. 58, No. 3, 2007, pp. 121-127

  3. Hławiczka A., Garbolino T.: On design of ring LFSRs and MISRs, [in:] (eds.) Proceedings of IEEE East-West Design & Test Symposium. EWDTS'07, Yerevan, Armenia, September 7-10, 2007. Kharkov National University of Radioelectronics. Piscataway : Institute of Electrical and Electronics Engineers 2007, pp. 27-34

  4. Garbolino T., Gucwa K., Kopeć M., Hławiczka A.: Avoiding crosstalk influence on interconnect delay fault testing, [in:] Girard P. et al. (eds.) Proceedings of the 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Kraków, Poland, April 11-13, 2007. Piscataway : Institute of Electrical and Electronics Engineers 2007, pp. 149-152

2008

  1. Hławiczka A., Gucwa K., Garbolino T., Kopeć M.: Interconnect faults identification and localization using modified ring LFSRs, [in:] Straube B. et al. (eds.) Proceedings of IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Bratislava, Slovakia, April 16-18, 2008. Piscataway : Institute of Electrical and Electronics Engineers, 2008, s. 247-250.

  2. Papa G., Garbolino T., Novak F.: Deterministic test pattern generator design, [in:] Giacobini M. et al. (eds.) Proceedings of European Workshops on the Theory and Applications of Evolutionary Computation EvoWorkshops 2008, Naples, Italy, March 26-28, 2008. Applications of evolutionary computing, Lecture Notes in Computer Science, Vol. 4974. Berlin : Springer, 2008, pp. 204-213

  3. Papa G., Garbolino T.: A new approach to optimization of test pattern generator structure. “Informacije MIDEM” - Journal of Microelectronics, Electronic Components and Materials, Vol. 38, No. 1, 2008, pp. 26-30

  4. Garbolino T., Papa G.: Test pattern generator design optimization based on genetic algorithm, [in:] Nguyen N.T., Borzemski L., Grzech A., et al. (eds.), Proceedings of 21th International Conference on Industrial, Engineering and Other Applications of Applied Intelligent Systems. IEA/AIE 2008, Wroclaw, Poland, June 18-20, 2008. New Frontiers in Applied Artificial Intelligence, Lecture Notes in Artificial Intelligence, Vol. 5027 pp. 580-589

  5. Kopeć M., Garbolino T., Gucwa K., Hławiczka A.: On application of polynomial algebra for identification of dynamic faults in interconnects. “Electronics and Telecommunications Quarterly”, Vol. 54, No. 1, 2008, pp. 29-41

  6. Hławiczka A., Garbolino T.: On design of high speed test pattern generators based on ring LFSRs. “Electronics and Telecommunications Quarterly”, Vol. 54, No. 1, 2008, pp. 43-51

  7. Hławiczka A., Gucwa K., Garbolino T., Kopeć M.: Application of modified ring-LFSR for interconnect faults detection, [in:] Napieralski A. (ed.) Proceedings of the 15th international conference Mixed Design of Integrated Circuits and Systems - MIXDES 2008. Politechnika Łódzka. Wydział Elektrotechniki i Elektroniki. Katedra Mikroelektroniki i Technik Informatycznych, 2008, pp. 487-492

  8. Hławiczka A., Gucwa K., Garbolino T.: Zastosowanie liniowych rejestrów pierścieniowych do testowania połączeń w układach FPGA. „Pomiary, Automatyka, Kontrola”, Vol. 54, No. 8, 2008, pp. 594-597

2009

  1. Rudnicki T., Garbolino T., Gucwa K., Hławiczka A.: Skuteczny generator testów dla przesłuchów w połączeniach, [in:] (ed.): Materiały 6. konferencji naukowej Informatyka - sztuka czy rzemiosło. KNWS'09, Rydzyna, 3-5 czerwca 2009. Zielona Góra: Uniwersytet Zielonogórski 2009, s. 60-62

  2. Hławiczka A., Gucwa K., Garbolino T.:Testing of crosstalk-type dynamic faults in interconnection networks with use of ring LFSRs, [in:] Napieralski A. (ed.): Proceedings of International Conference : Mixed Design of Integrated Circuits and Systems - MIXDES 2009, Łódź, Poland, 25-27 June, 2009.

  3. Rudnicki T., Garbolino T., Gucwa K., Hławiczka A.: Skuteczny generator testów dla przesłuchów w połączeniach. „Pomiary, Automatyka, Kontrola”, vol. 55, nr 7, 2009, s. 432-434

  4. Hławiczka A., Gucwa K., Garbolino T.: Testowanie dynamicznych uszkodzeń typu przesłuchy w sieciach połączeń przy użyciu rejestrów pierścieniowych R-LFSR. „Pomiary, Automatyka, Kontrola”, vol. 55, nr 8, 2009, s. 572-574

  5. Garbolino T., Gucwa K., Hławiczka A., Kopeć M.: An Interconnect BIST for crosstalk faults based on a Ring LFSR, [in:] Proceedings of IEEE East-West Design and Test Symposium - EWDTS'09, Moscow, Russia, September 18-21, 2009. Moscow : Institute of Electrical and Electronics Engineers, 2009, pp. 381-384

  6. Rudnicki T., Garbolino T., Gucwa K., Hławiczka A.: Effective BIST for crosstalk faults in interconnects, [in:] (eds.): Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. DDECS'2009, Liberec, Czech Republic, April 15-17, 2009. Piscataway : Institute of Electrical and Electronics Engineers 2009, pp. 164-169

  7. Papa G., Garbolino T., Novak F.: Evolutionary-Based Design of Deterministic Test Pattern Generator, [in:] Bernstein R.B., Curtis W.N. (eds.): Artificial Intelligence: New Research. Nova Science Publishers 2009, pp. 415-428

  8. Papa G., Garbolino T.: Evolutionary-based artificial intelligence approach to the test pattern generator design, [in:] Burczyński T., Cholewa W., Moczulski W. (eds.): Recent developments in artificial intelligence methods. AI-METH 2009, Gliwice, Poland, 18 19 November 2009. Eds:. Silesian University of Technology. Faculty of Mechanical Engineering. Department of Fundamentals of Machinery Design. Department of Strength of Materials and Computational Mechanics. Gliwice : Centre of Excellence AI-METH. Silesian University of Technology, 2009, pp. 235-246

  9. Hławiczka A., Gucwa K., Garbolino T.: On the use of Ring LFSR based BIST for Detection, Identification and Localization of Static and Dynamic Faults in Interconnects. “Theoretical and Applied Informatics”, Vol. 21, No. 1, 2009, pp. 23-36

2010

  1. Garbolino T. Papa G.: Genetic algorithm for test pattern generator design. Automatic evolution of circuits. “Applied Intelligence”, Vol. 32, No. 2, Special Issue: SI, 2010, pp. 193-204

  2. Garbolino T., Gucwa K., Hławiczka A.: Testing of interconnections with use of reduced-size signature-based diagnostic dictionary. “Electronics - Constructions, Technologies, Applications”, Vol. 51 No. 11, 2010, pp. 15-18

  3. Garbolino T., Gucwa K., Hławiczka A.: Testing of interconnections with use of reduced-size signature-based diagnostic dictionary, [in:] Napieralski A. (ed.): Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2010, Wrocław, Poland, 24-26 June 2010. Department of Microelectronics and Computer Science, Technical University of Łódź 2010, pp. 486-491 (CD-ROM)

  4. Garbolino T., Gucwa K., Hławiczka A.: How to reduce size of a signature-based diagnostic dictionary used for testing of connections, [in:] (eds.): Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems Vienna, Austria, April 14-16, 2010. Piscataway : Institute of Electrical and Electronics Engineers 2010, pp. 201-204

  5. Hławiczka A., Gucwa K., Garbolino T.: Testing of crosstalk-type dynamic faults in interconnection networks with use of ring LFSRs. “Electrical Review”, Vol. 86, No. 11a, 2010, pp. 133-137

2011

  1. Garbolino T., Gucwa K., Hławiczka A.: Sygnaturowy słownik diagnostyczny o niewielkich rozmiarach wykorzystywany w testowaniu połączeń. „Pomiary, Automatyka, Kontrola”, Vol. 57, No. 1, 2011, pp. 52-54

  2. Gucwa K., Garbolino T. Hławiczka A.: Analysis of Operation of Ring LFSR Used for Testing of Unidirectional Interleaved Interconnections, [in:] Napieralski A. (ed.): Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2011, Gliwice, Poland, 16-18 June 2011. Department of Microelectronics and Computer Science, Technical University of Łódź 2011, pp. 479-484 (CD-ROM)

  3. Gucwa K. Garbolino T., Hławiczka A.: Analysis of operation of ring LFSR used for testing of unidirectional interleaved interconnections. “Electronics - Constructions, Technologies, Applications”, Vol. 52 No. 12, 2011, pp. 50-53

  4. Papa G., Garbolino T.: Optimal on-line built-in self-test structure for system-reliability improvement, [in:] Smith A. E. (ed.): Proceedings of 2011 IEEE Congress on Evolutionary Computation, New Orleans, USA: June 5-8 2011. IEEE Press, 2011, pp. 222-229

  5. Papa G., Garbolino T.: Stochastic Approach to Test Pattern Generator Design, [in:] Dritsas I. (ed.): Stochastic Optimization - Seeing the Optimal for the Uncertain. InTech 2011, pp. 75-94

2014

  1. Garbolino Tomasz. Designing of Test Pattern Generators for Stimulation of Crosstalk Faults in Bus-type Connections, 2014. IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 23/04/2014-25/04/2014, Warsaw, POLAND. PROCEEDINGS OF THE 2014 IEEE 17TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS), ISBN: 978-1-4799-4558-0, pp. 270-273

2015

  1. Garbolino Tomasz. New Structure of Test Pattern Generator Stimulating Crosstalks in Bus-type Connections, 2015. International Journal of Electronics and Telecommunications, vol. 61, no. 1, pp. 67-75

2016

  1. Garbolino Tomasz. Wybrane metody testowania i diagnostyki połączeń między modułami systemów cyfrowych., 2016. Prace Komisji Naukowych, ISBN: 978-8-3886-5756-6, pp. 327-331

 


Podręczniki i skrypty:

  1. T. Garbolino, K. Gucwa, A. Hławiczka, D. Kania, J. Kardaszewicz, J.Kulisz, A. Morawiec: „Laboratorium podstaw techniki cyfrowej”. Praca zbiorowa. Pod red. A. Hławiczki. Wydaw. Politechniki Śląskiej, Gliwice , 2001, 274 s. Skrypt nr 2261.

  2. T. Garbolino, K. Gucwa, A. Hławiczka, D. Kania, J. Kardaszewicz, J.Kulisz, A. Morawiec: „Laboratorium podstaw techniki cyfrowej”. Praca zbiorowa. Pod red. A. Hławiczki. Wydaw. Politechniki Śląskiej, Gliwice , 2002, 274 s. Skrypt nr 2297.

  3. T. Garbolino, K. Gucwa, A. Hławiczka, D. Kania, J. Kardaszewicz, J.Kulisz, A. Morawiec: „Laboratorium podstaw techniki cyfrowej”. Praca zbiorowa. Pod red. A. Hławiczki. Wydaw. Politechniki Śląskiej, Gliwice , 2010, 268 s. Skrypt nr 2458.