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Lista publikacji


Rozprawa doktorska

Metoda projektowania topografii złożonych cyfrowych układów scalonych w oparciu o generatory ich modułów składowych, Instytut Elektroniki Politechniki Śląskiej w Gliwicach, październik 1990


Artykuły i referaty konferencyjne (1982 – 1991):

  1. W.Sakowski, J.Szlufcik, “Capabilities of thick film laboratory, Silesian Technical University Scientific Letters, series AUTOMATICS, no. 73, Gliwice 1984
  2. W.Sakowski, Using MODLAN hardware description language in microprocessor systems diagnostics, Silesian Technical University Scientific Letters, series AUTOMATICS, no.83,Gliwice 1987
  3. T.Grabowiecki, A.Pawlak, W.Sakowski: University Environment for Structured Design of Correct By Construction ICs, Microprocessing and Microprogramming, vol.23, str. 37-43, 1988
  4. W.Sakowski, ALL - a Procedural Layout Description Language for Module Generators Development, Proc. of 6th Symposium on Microprocessor and Microcomputer Applications, Budapest, 1989
  5. M.Ossysek, W.Sakowski: Automatic Hardware Synthesis Based on Behavioral Descriptions, Proc. of AMSE International Conference "Signal and Systems", Cetinje, 1990 (publikacja przed doktoratem, ale tematyka nie związana z nim, otwierająca nowy obszar badań)
  6. W.Sakowski, Merging textual and graphic representations of IC layout within CAD environment, XVII Konferencja Teorii Obwodów i Układów Elektronicznych, Bielsko-Biała, 1990
  7. W.Sakowski, Elements of Design Framework for Module Generator Design and Usage, Digest of Papers of 4th CSI/IEEE International symposium on VLSI Design: VLSI Design'91, New Delhi


Artykuły i referaty konferencyjne (1992 – 2012):

  1. Sakowski W., Ossysek M., Nowak B.: VHDL as a Specification Language for High Level Synthesis System, Proceedings on International Conference of Microelectronics: Microelectronics'92, Warszawa, wrzesień 1992
  2. Sakowski W., Wrona W.: A software toolset for VHDL education and modelling support, Proceedings on Workshop on Design Methodologies for Microelectronics and Signal Processing, Gliwice/Kraków, październik 1993
  3. Duda K., Morawiec A., Sakowski W.: Elements of an Environment for Experiments with High Level Synthesis, XVII Krajowa Konferencja Teoria Obwodów i Układy Elektroniczne, Karpacz, październik 1994
  4. Jaklewicz M., Pułka A., Sakowski W. et al: Modeling Microcontrollers with VHDL Language, International Conference on Programmable Devices and Systems, Gliwice listopad 1995
  5. Wojciech Sakowski Mirosław Bandzerewicz: Development of a configurable microcontroller core, Forum on Design Languages FDL’99, Lyon, September 1999
  6. Mirosław Bandzerewicz, Wojciech Sakowski, Włodzimierz Wrona: A systematic development of virtual components compatible to standard ICs (an industrial experience), The International Workshop on Discrete-Event System Design, DESDes’01, June 27÷29, 2001; Przytok near Zielona Gora, Poland
  7. Grzegorz Potok, Adam Bitniok, Wojciech Sakowski, Włodzimierz Wrona: CORDIC Algorithm Implemented as a Virtual Component, IASTED International Conference on Modelling and Simulation (MS2001), 16-18 maj 2001r., Pittsburgh, USA
  8. Włodzimierz Wrona, Wojciech Sakowski, Tomasz Jakóbiec, Paweł Jeż, CANBUS controller implementation as an example of ip core modelling for transport systems, Telematyka Systemów Transportowych, II International Conference, Katowice-Ustroń, 7-9 November 2002
  9. Maciej Pyka, Wojciech Sakowski, Włodzimierz Wrona: Developing The Concept Of Hardware Modeling To Enhance Verification Process In Virtual Component Design, 6th IEEE International Workshop onDesign and Diagnostics of Electronic Circuits and Systems DDECS 2003, Poznan, April 2003, Poland
  10. W. Sakowski, M.Bandzerewicz, W. Pyka, W. Wrona: A Methodology For Developing Ip Cores That Replace Obsolete Ics An Industrial Experience in Design of Embedded Control Systems, edited by M.A.Adamski,, A.Karatkevich, M.Wegrzyn. Springer Verlag, 2005
  11. W. Sakowski, W. Wrona Hardware / software co-verification in an 8-bit SoC design platform, Proceedings of International Conference The Information Systems: Next Generations (ISNG 2005) Las Vegas, April 2005
  12. Wojciech Sakowski, Maciej Pyka, From Obsolete Part Replacement To Enhanced Legacy Microprocessor Architectures, Proceedings of IP/SoC’2005: IP Based SoC Design Conference, Grenoble, Dec. 2005
  13. Filip Rak, Wojciech Sakowski, Transaction Level Model Of IEEE 1394 Serial Bus Link Layer Controller Ip Core And Its Use In The Software Driver Development, Proceedings of IP/SoC’2005: IP Based SoC Design Conference, Grenoble, Dec. 2005
  14. Dariusz Kaczmarczyk, Wojciech Sakowski, Developing and Supporting a Family of USB Device Controller Cores - A Case Study on Building High Quality Silicon IP, Krajowa Konferencja Elektroniki, Darłówko, czerwiec 2006
  15. Maciej Pyka, Wojciech Sakowski, Configurable 8-Bit Microcontroller IP Core as a Basis for Effective System on Chip Implementation, Proceedings of the 3rd IFAC Workshop on Discrete-Event System Design, DESDes’06, Rydzyna, Polska, wrzesień 2006
  16. Wojciech Sakowski, Sebastian Kaprowski, Maciej Przybysz, Wlodzimierz Wrona, Enhanced legacy 68000 instruction set architecture as a basis for system on chip development, Proceedings of the International Symposium on System-on-Chip 2006, Tampere, Finlandia, 13-16 listopad, 2006
  17. Dariusz Kaczmarczyk, Wojciech Sakowski, Integrating USB functionality into system-on-chip – elements of the technical solution, Elektronika, listopad 2006
  18. Marek Podeszwa, Filip Rak, Wojciech Sakowski, Transaction Level Model of the USB On-The-Go controller IP core, Proceedings of IP/SoC’2006: IP Based SoC Design Conference, Grenoble, France, grudzień 2006
  19. Bartosz Wojciechowski, Tomasz Kowalczyk, Wojciech Sakowski, Design Platform for Quick Integration of an Internet Connectivity into System-on-Chips, Proceedings of DDECS’2007, Kraków, kwiecień 2007
  20. Filip Rak, Wojciech Sakowski, Development and use of an Instruction Set Simulator of 68000-compatible processor core, w Proceedings of IP/SoC’2007: IP Based SoC Design Conference, Grenoble, France, grudzień 2007
  21. Adam Pawlak, Piotr Penkala, Håvard D. Jørgensen, Paweł Fraś, Wojciech Sakowski, Collaborative Engineering Approach Towards IP-Based Soc Design, w Proceedings of IP/SoC’2007: IP Based SoC Design Conference, Grenoble, France, grudzień 2007
  22. Filip Rak, Wojciech Sakowski, 8051 Instruction Set Simulator, w Proceedings of IP/SoC’2008: IP Based SoC Design Conference, Grenoble, France, grudzień 2008
  23. Wojciech Sakowski, Szymon Grzybek, Piotr Penkala, Adam Pawlak, Paweł Fraś, Mixed-signal USB IP core design using distributed collaborative approach, Mixed Design of Integrated Circuits and Systems Conference, Łódź, czerwiec 2009
  24. Adam Pawlak, Piotr Penkala, Paweł Fraś, Wojciech Sakowski, Günter Grau, Alexander Stanitzki, Szymon Grzybek , Distributed collaborative design of a mixed-signal IP component, Euromicro Conference on Digital System Design (DSD 2009), Patras, Grecja, sierpień 2009
  25. Ireneusz Sobanski, Wojciech Sakowski, Verification of USB 3.0 Device IP Core in Multi-Layer SystemC Verification Environment, Proceedings of IP-ESC’2009: IP Based SoC Design Conference, Grenoble, France, grudzień 2009
  26. I. Sobański, W. Sakowski;, Hardware/Software co-design in USB3.0 Mass Storage Application, w: Proceedings of International Conference on Signals and Electronic Systems, wrzesień 2010, Gliwice, Polska
  27. Adam PAWLAK, Wojciech SAKOWSKI, Piotr PENKALA, Paweł FRAŚ, Szymon GRZYBEK, Distributed collaborative design - a case study for mixed-signal IP core, Przegląd Elektrotechniczny, listopad 2010
  28. D. Pieńkowski, D. Kaczmarczyk, T.Klimek, H.Peterson, W.Sakowski, Systematic approach to verification of a mixed signal IP. HSIC PHY case study, w Proceedings of IP-ESC’2010: IP Based SoC Design Conference, Grenoble, France, grudzień 2010
  29. Koczor A., Sakowski W., SystemC library supporting OVM compliant verification methodology, w Proceedings of IP-SOC’2011: IP Based SoC Design Conference, Grenoble, France, grudzień 2011